A research report from Everbright Securities Company Limited indicates that as computing chips evolve toward larger sizes and higher integration, the performance of traditional organic packaging substrates is gradually approaching physical limits. Compared to organic materials, glass substrates offer ultra-low warpage and superior thermal and mechanical stability, supporting larger package dimensions while enabling approximately an order of magnitude improvement in routing design rules—roughly 10 times higher interconnect density. This capability allows continued transistor stacking within a single package, extending the momentum of Moore's Law.

According to SEMI projections, glass substrates are expected to enter limited production around 2028, with the market size forecast to grow at a CAGR of approximately 67.2% from 2028 to 2040, corresponding to a market opportunity of roughly 130 billion USD by 2040.

Glass substrates are poised to become the next-generation core carrier for advanced packaging of AI computing chips, with the industry steadily moving toward commercialization

Intel has invested approximately one billion USD over nearly a decade of research and development, planning to deliver a complete glass substrate solution in the latter half of this decade, around 2026 to 2030. On the domestic front, BOE initiated pre-research on glass substrate carriers in 2020 and achieved full automation line connectivity for its glass substrate packaging carrier trial production line in the first half of 2026, with a designed capacity of 1,000 panels per month. Additionally, the company completed sample development and customer delivery for large-size, high-layer-count glass substrate carriers in 2025.

SEMI anticipates that glass substrates will enter limited production around 2028, with the market expanding at a CAGR of roughly 67.2% between 2028 and 2040, reaching an estimated market size of 130 billion USD by 2040.

PID materials are becoming the critical dielectric materials for high-density interconnects in glass substrates, with PSPI emerging as one of the mainstream categories

In the redistribution layer process of glass substrates, the dielectric layer must simultaneously possess fine patterning capability and excellent electrical and thermal properties. As high-density interconnect requirements advance, specifications for line width and line spacing in dielectric layer patterns continue to tighten, driving increased adoption of photosensitive dielectric materials. PSPI, a typical PID material, retains the heat resistance, insulation, high mechanical strength, and low dielectric properties of polyimide while adding photolithographic patterning capability, making it suitable for RDL layers as well as buffer or passivation layers for IC chips.

Overseas manufacturers have made significant R&D progress in PID materials for glass substrates. Toray launched a photodefinable polyimide sheet in December 2025, which enables simultaneous RDL microfabrication and TGV resin filling, significantly shortening process flows and reducing costs. The company plans to commence mass production within its fiscal year starting April 2026. Fujifilm's LTC 9300 and Durimide series photo-imageable polyimides are also positioned for RDL and buffer layers in advanced packaging. Beyond polyimide-based materials, DuPont's Cyclotene BCB material, known for its low dielectric constant, low loss, and low moisture absorption, is also applicable to advanced packaging RDL applications.

Domestic companies have achieved scale breakthroughs in display-grade PSPI and are accelerating expansion into semiconductor advanced packaging

Several domestic players are making notable strides in this space. One company's PSPI products achieved first-batch mass production supply on a G8.6-generation AMOLED production line that represents one of the world's first commercial-scale implementations, while continuing R&D and customer validation for fluorine-free PSPI and black pixel definition layer materials. In the semiconductor packaging arena, the same company has deployed eight PI products, three of which have secured orders from multiple customers.

Another domestic firm, leveraging its PSPI material expertise and mature display materials industrialization capabilities, has explicitly entered the glass substrate carrier materials segment. It is independently developing ultra-thin, low-stress dielectric films for domestic substitution while custom-developing high-performance PSPI materials specifically for packaging applications.

A third company has established deep strategic cooperation with a leading Japanese industry player in its PSPI monomer business, while investing 75 million RMB in a packaging-grade PSPI materials industrialization project in Pucheng Haitian, with completion expected in the second quarter of 2027.

A fourth company has completed its PSPI production line and finished pilot development of advanced packaging-grade PSPI photosensitive resins, laying the groundwork for expansion into semiconductor materials.

Key risks to monitor include downstream demand falling short of expectations, product development risks, slower-than-anticipated customer adoption, and intensifying industry competition.